start implementing ppu_render_update
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e88697c773
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20
include/gb.h
20
include/gb.h
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@ -102,13 +102,33 @@ typedef struct oam_scan_table {
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ut8 addr;
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ut8 addr;
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} OAMScanTable;
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} OAMScanTable;
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typedef struct pixel_fifo_t {
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ut64 data;
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ut32 fetch;
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ut32 obj_fetch;
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ut8 shift_out; //lower nibble is sourch info, pallet, color
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// 0b....spcc
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#if 0
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bg - 00
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win - 01
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obj p0 - 10
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obj p1 - 11
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#endif
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ut8 n_fpixel; //number of pixel that are currently in the upper half of the fifo - 1
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ut8 x;
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ut8 y;
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} PixelFifo;
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typedef struct gb_dmg_ppu_t {
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typedef struct gb_dmg_ppu_t {
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GBPixBuf *pixbuf;
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GBPixBuf *pixbuf;
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ut64 seek;
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ut64 seek;
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ut8 buf[GB_PPU_N_REGS];
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ut8 buf[GB_PPU_N_REGS];
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OAMScanTable ost;
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OAMScanTable ost;
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PixelFifo fifo;
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int reg_fd;
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int reg_fd;
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int vram_fd;
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int vram_fd;
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ut32 vram_mapid;
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ut32 oam_mapid;
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} GBPPU;
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} GBPPU;
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typedef struct gameboy_t {
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typedef struct gameboy_t {
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33
io/ppu.c
33
io/ppu.c
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@ -145,7 +145,7 @@ static ut32 gb_ppu_oam_scan_update (GB *gb, ut32 cycles) {
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if (gb->ppu->ost.n_entries < 10) {
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if (gb->ppu->ost.n_entries < 10) {
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ut8 yx[2];
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ut8 yx[2];
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r_io_fd_read_at (gb->io, gb->dma->oam_fd, (ut64)gb->ppu->ost.addr, yx, 2);
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r_io_fd_read_at (gb->io, gb->dma->oam_fd, (ut64)gb->ppu->ost.addr, yx, 2);
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if ((yx[0] <= ly) && (ly < (yx[0] + height))) {
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if ((yx[0] <= ly) && (ly < (yx[0] + height)) && yx[1]) {
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gb->ppu->ost.data[gb->ppu->ost.n_entries] =
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gb->ppu->ost.data[gb->ppu->ost.n_entries] =
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(gb->ppu->ost.addr << 8) | yx[1];
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(gb->ppu->ost.addr << 8) | yx[1];
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gb->ppu->ost.n_entries++;
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gb->ppu->ost.n_entries++;
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@ -158,10 +158,38 @@ beach:
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if (gb->ppu->ost.addr == 0xa0) {
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if (gb->ppu->ost.addr == 0xa0) {
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//indicate next mode
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//indicate next mode
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gb->ppu->buf[GB_PPU_STAT] |= GB_PPU_STAT_MODE_RENDER;
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gb->ppu->buf[GB_PPU_STAT] |= GB_PPU_STAT_MODE_RENDER;
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RIOMap *vram = r_io_map_get (gb->io, gb->ppu->vram_mapid);
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vram->perm = 0; //disable vram access for rendering
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}
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}
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return cycles;
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return cycles;
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}
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}
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static void gb_ppu_pixel_fifo_merge_opixels (PixelFifo *pxf, bool priority) {
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ut32 pixels = pxf->data >> 32;
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ut32 newpixels = 0;
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ut32 i;
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for (i = 0; i < 8; i++) {
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if (!(pixels & (0x3 << 28))) {
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newpixels = (newpixels << 4) |
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((pxf->obj_fetch & (0xf << ((i - 1) << 2))) >> ((i - 1) << 2));
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pixels = pixels << 4;
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continue;
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}
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}
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}
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static ut32 gb_ppu_render_update (GB *gb, ut32 cycles) {
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return 0;
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}
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static ut32 gb_ppu_hblank_update (GB *gb, ut32 cycles) {
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return 0;
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}
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static ut32 gb_ppu_vblank_update (GB *gb, ut32 cycles) {
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return 0;
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}
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void gb_ppu_update (GB *gb, ut32 cycles) {
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void gb_ppu_update (GB *gb, ut32 cycles) {
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while (cycles) {
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while (cycles) {
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switch (gb->ppu->buf[GB_PPU_STAT] & GB_PPU_STAT_MODE_MASK) {
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switch (gb->ppu->buf[GB_PPU_STAT] & GB_PPU_STAT_MODE_MASK) {
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@ -169,10 +197,13 @@ void gb_ppu_update (GB *gb, ut32 cycles) {
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cycles = gb_ppu_oam_scan_update (gb, cycles);
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cycles = gb_ppu_oam_scan_update (gb, cycles);
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break;
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break;
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case GB_PPU_STAT_MODE_RENDER:
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case GB_PPU_STAT_MODE_RENDER:
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cycles = gb_ppu_render_update (gb, cycles);
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break;
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break;
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case GB_PPU_STAT_MODE_HBLANK:
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case GB_PPU_STAT_MODE_HBLANK:
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cycles = gb_ppu_hblank_update (gb, cycles);
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break;
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break;
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case GB_PPU_STAT_MODE_VBLANK:
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case GB_PPU_STAT_MODE_VBLANK:
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cycles = gb_ppu_vblank_update (gb, cycles);
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break;
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break;
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}
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}
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}
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}
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